Heat dissipation from multi-chip high power modules without adversely affecting the mechanical stability and fatigue life of the solder joints is a problem for the industry.
Current modular designs do not effectively dissipate heat beyond power densities on the order of 25 watts/cm.sup.2 without resorting to expensive methods such as use of water or liquid coolant, which minimizes the external thermal resistance and consequently permits a worse internal thermal resistance. The power dissipation limit results from both the internal and external thermal resistance to heat flow.
For air cooled flip chip modules the majority of the thermal resistance is the external resistance. The internal resistance is dominated by the resistance of the chip to cap interface, which is typically filled with a thermal paste. One way to significantly reduce this interface resistance is to replace the paste with solder, but this replaces a compliant interface with a rigid interface, which can cause stresses that adversely affect other parts of the package.
In order to achieve higher power dissipation without compromising fatigue life of solder connections it must be possible to solder the chips to the cap with different gaps between them. It is known that there can be gaps that vary by plus or minus 3 mils between the cap and the chips. The assembly must balance the thermal expansion in the x, y and z directions for the substrate, cap and the chip/solder structure so that the shear and tensile stresses in the solder thermal interface, solder seal, and solder interconnections are kept within acceptable limits.
There are instances of heat sinks directly attached to a single chip and not connected to the substrate because of stresses and fatigue problems, however, this approach is not conducive to, and effective for MCM's that must be encapsulated to avoid corrosion and excessive fatigue damage of solder interconnections due to high concentrations of oxygen. The best thermal performance today is the dissipation of about 50 watts/cm.sup.2, (at the chip level), using air-cooled heat-sinks.
U.S. Pat. Nos. 4,034,468 4,323,914, 4,607,277, 4,654,966, 4,825,284, 4,920,574, 5,126,919 5,276,586, 5,325,265 and 5,396,403 disclose various types of packages for semi-conductor devices with the provision of heat transfer from the chip to the ambient environment.